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lavc/aarch64: new optimization for 8-bit hevc_pel_bi_pixels

put_hevc_pel_bi_pixels4_8_c: 54.7
put_hevc_pel_bi_pixels4_8_neon: 43.0
put_hevc_pel_bi_pixels6_8_c: 94.7
put_hevc_pel_bi_pixels6_8_neon: 37.0
put_hevc_pel_bi_pixels8_8_c: 171.0
put_hevc_pel_bi_pixels8_8_neon: 24.0
put_hevc_pel_bi_pixels12_8_c: 354.0
put_hevc_pel_bi_pixels12_8_neon: 68.7
put_hevc_pel_bi_pixels16_8_c: 588.2
put_hevc_pel_bi_pixels16_8_neon: 77.5
put_hevc_pel_bi_pixels24_8_c: 1670.7
put_hevc_pel_bi_pixels24_8_neon: 173.0
put_hevc_pel_bi_pixels32_8_c: 2267.7
put_hevc_pel_bi_pixels32_8_neon: 281.2
put_hevc_pel_bi_pixels48_8_c: 5787.5
put_hevc_pel_bi_pixels48_8_neon: 673.5
put_hevc_pel_bi_pixels64_8_c: 9897.0
put_hevc_pel_bi_pixels64_8_neon: 1159.5

Co-Authored-By: J. Dekker <jdek@itanimul.li>
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Logan Lyu 2023-11-05 16:33:17 +08:00 committed by Martin Storsjö
parent d0ec826077
commit 40cf4a5ca3
2 changed files with 185 additions and 0 deletions

View File

@ -244,6 +244,185 @@ function ff_hevc_put_hevc_pel_pixels64_8_neon, export=1
endfunc
function ff_hevc_put_hevc_pel_bi_pixels4_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
1: ld1 {v0.s}[0], [x2], x3 // src
ushll v16.8h, v0.8b, #6
ld1 {v20.4h}, [x4], x10 // src2
sqadd v16.8h, v16.8h, v20.8h
sqrshrun v0.8b, v16.8h, #7
st1 {v0.s}[0], [x0], x1
subs w5, w5, #1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels6_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
sub x1, x1, #4
1: ld1 {v0.8b}, [x2], x3
ushll v16.8h, v0.8b, #6
ld1 {v20.8h}, [x4], x10
sqadd v16.8h, v16.8h, v20.8h
sqrshrun v0.8b, v16.8h, #7
st1 {v0.s}[0], [x0], #4
st1 {v0.h}[2], [x0], x1
subs w5, w5, #1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels8_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
1: ld1 {v0.8b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ld1 {v20.8h}, [x4], x10 // src2
sqadd v16.8h, v16.8h, v20.8h
sqrshrun v0.8b, v16.8h, #7
subs w5, w5, #1
st1 {v0.8b}, [x0], x1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels12_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
sub x1, x1, #8
1: ld1 {v0.16b}, [x2], x3
ushll v16.8h, v0.8b, #6
ushll2 v17.8h, v0.16b, #6
ld1 {v20.8h, v21.8h}, [x4], x10
sqadd v16.8h, v16.8h, v20.8h
sqadd v17.8h, v17.8h, v21.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun2 v0.16b, v17.8h, #7
st1 {v0.8b}, [x0], #8
subs w5, w5, #1
st1 {v0.s}[2], [x0], x1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels16_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
1: ld1 {v0.16b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ushll2 v17.8h, v0.16b, #6
ld1 {v20.8h, v21.8h}, [x4], x10 // src2
sqadd v16.8h, v16.8h, v20.8h
sqadd v17.8h, v17.8h, v21.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun2 v0.16b, v17.8h, #7
subs w5, w5, #1
st1 {v0.16b}, [x0], x1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels24_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
1: ld1 {v0.8b-v2.8b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ushll v17.8h, v1.8b, #6
ushll v18.8h, v2.8b, #6
ld1 {v20.8h-v22.8h}, [x4], x10 // src2
sqadd v16.8h, v16.8h, v20.8h
sqadd v17.8h, v17.8h, v21.8h
sqadd v18.8h, v18.8h, v22.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun v1.8b, v17.8h, #7
sqrshrun v2.8b, v18.8h, #7
subs w5, w5, #1
st1 {v0.8b-v2.8b}, [x0], x1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels32_8_neon, export=1
mov x10, #(MAX_PB_SIZE * 2)
1: ld1 {v0.16b-v1.16b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ushll2 v17.8h, v0.16b, #6
ushll v18.8h, v1.8b, #6
ushll2 v19.8h, v1.16b, #6
ld1 {v20.8h-v23.8h}, [x4], x10 // src2
sqadd v16.8h, v16.8h, v20.8h
sqadd v17.8h, v17.8h, v21.8h
sqadd v18.8h, v18.8h, v22.8h
sqadd v19.8h, v19.8h, v23.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun2 v0.16b, v17.8h, #7
sqrshrun v1.8b, v18.8h, #7
sqrshrun2 v1.16b, v19.8h, #7
st1 {v0.16b-v1.16b}, [x0], x1
subs w5, w5, #1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels48_8_neon, export=1
mov x10, #(MAX_PB_SIZE)
1: ld1 {v0.16b-v2.16b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ushll2 v17.8h, v0.16b, #6
ushll v18.8h, v1.8b, #6
ushll2 v19.8h, v1.16b, #6
ushll v20.8h, v2.8b, #6
ushll2 v21.8h, v2.16b, #6
ld1 {v24.8h-v27.8h}, [x4], #(MAX_PB_SIZE) // src2
sqadd v16.8h, v16.8h, v24.8h
sqadd v17.8h, v17.8h, v25.8h
sqadd v18.8h, v18.8h, v26.8h
sqadd v19.8h, v19.8h, v27.8h
ld1 {v24.8h-v25.8h}, [x4], x10
sqadd v20.8h, v20.8h, v24.8h
sqadd v21.8h, v21.8h, v25.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun2 v0.16b, v17.8h, #7
sqrshrun v1.8b, v18.8h, #7
sqrshrun2 v1.16b, v19.8h, #7
sqrshrun v2.8b, v20.8h, #7
sqrshrun2 v2.16b, v21.8h, #7
subs w5, w5, #1
st1 {v0.16b-v2.16b}, [x0], x1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_pel_bi_pixels64_8_neon, export=1
1: ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x2], x3 // src
ushll v16.8h, v0.8b, #6
ushll2 v17.8h, v0.16b, #6
ushll v18.8h, v1.8b, #6
ushll2 v19.8h, v1.16b, #6
ushll v20.8h, v2.8b, #6
ushll2 v21.8h, v2.16b, #6
ushll v22.8h, v3.8b, #6
ushll2 v23.8h, v3.16b, #6
ld1 {v24.8h, v25.8h, v26.8h, v27.8h}, [x4], #(MAX_PB_SIZE) // src2
sqadd v16.8h, v16.8h, v24.8h
sqadd v17.8h, v17.8h, v25.8h
sqadd v18.8h, v18.8h, v26.8h
sqadd v19.8h, v19.8h, v27.8h
ld1 {v24.8h, v25.8h, v26.8h, v27.8h}, [x4], #(MAX_PB_SIZE)
sqadd v20.8h, v20.8h, v24.8h
sqadd v21.8h, v21.8h, v25.8h
sqadd v22.8h, v22.8h, v26.8h
sqadd v23.8h, v23.8h, v27.8h
sqrshrun v0.8b, v16.8h, #7
sqrshrun2 v0.16b, v17.8h, #7
sqrshrun v1.8b, v18.8h, #7
sqrshrun2 v1.16b, v19.8h, #7
sqrshrun v2.8b, v20.8h, #7
sqrshrun2 v2.16b, v21.8h, #7
sqrshrun v3.8b, v22.8h, #7
sqrshrun2 v3.16b, v23.8h, #7
st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1
subs w5, w5, #1
b.ne 1b
ret
endfunc
function ff_hevc_put_hevc_epel_v4_8_neon, export=1
load_epel_filterb x5, x4
sub x1, x1, x2

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@ -156,6 +156,10 @@ NEON8_FNPROTO(pel_pixels, (int16_t *dst,
const uint8_t *src, ptrdiff_t srcstride,
int height, intptr_t mx, intptr_t my, int width),);
NEON8_FNPROTO(pel_bi_pixels, (uint8_t *dst, ptrdiff_t dststride,
const uint8_t *_src, ptrdiff_t _srcstride, const int16_t *src2,
int height, intptr_t mx, intptr_t my, int width),);
NEON8_FNPROTO(epel_v, (int16_t *dst,
const uint8_t *src, ptrdiff_t srcstride,
int height, intptr_t mx, intptr_t my, int width),);
@ -324,6 +328,8 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
NEON8_FNASSIGN(c->put_hevc_epel, 1, 0, epel_v,);
NEON8_FNASSIGN(c->put_hevc_qpel, 0, 0, pel_pixels,);
NEON8_FNASSIGN(c->put_hevc_qpel, 1, 0, qpel_v,);
NEON8_FNASSIGN(c->put_hevc_epel_bi, 0, 0, pel_bi_pixels,);
NEON8_FNASSIGN(c->put_hevc_qpel_bi, 0, 0, pel_bi_pixels,);
NEON8_FNASSIGN(c->put_hevc_epel_uni, 0, 0, pel_uni_pixels,);
NEON8_FNASSIGN(c->put_hevc_epel_uni, 1, 0, epel_uni_v,);
NEON8_FNASSIGN(c->put_hevc_qpel_uni, 0, 0, pel_uni_pixels,);